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tranceivers - tx rfics - smt 1 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz general description features functional diagram typical applications the HMC1197LP7FE is a low noise, high linearity direct quadrature modulator with fractional-n pll&vco rfic which is ideal for digital modulation applications from 0.1 to 4.0 ghz including; cellular/3g, lte/wimax/4g, broadband wireless access & ism circuits housed in a compact 7x7 mm (lp7) smt qfn package, the HMC1197LP7FE rfic requires minimal external components & provides a low cost alternative to more complicated double upconversion architectures. the rf output port is single-ended and matched to 50 ohms with no external components. auxiliary lo output ( differential or single-ended), enables the HMC1197LP7FE to distribute identical frequency and phase signals to multiple destinations. individual gain settings ensure optimal signal levels tailored to each output. external vco input allows the HMC1197LP7FE to lock external vcos, and enables cascaded lo architectures for mimo radio applications. two separate charge pump (cp) outputs enable separate loop flters optimized for both integrated and external vcos, and seamless switching between integrated or external vcos during operation. programmable rf output phase feature can further phase adjust and synchronize multiple HMC1197LP7FE s enabling scalable mimo and beam-forming radio architectures. integrated programmable low pass filter (lpf) on the modulator lo input ensures no lo harmonic contribution to modulator sideband rejection performance. sixteen programmable lpf bands enable true wideband operation, eliminating the need for external band specifc harmonic fltering hardware. additional features include confgurable lo output mute function. exact frequency mode that enables the HMC1197LP7FE to generate fractional frequencies with 0 hz frequency error and the ability to synchronously change frequencies without changing the phase of the output signal. very low noise floor, -160 dbm/hz excellent carrier & sideband suppression very high linearity, +30 dbm oip3 high output power, +10.5 dbm output p1db high modulation accuracy maximum phase detector rate: 100 mhz low phase noise: -110 dbc/hz in band typical pll fom: -230 dbc/hz integer mode, -227 dbc/hz fractional mode < 160 fs integrated rms jitter (10 khz to 20 mhz) differential auxiliary lo output external lo input exact frequency mode: 0 hz fractional frequency error programmable rf output phase output phase synchronous frequency changes output phase synchronization internal lo mute function 48 lead 7x7 mm qfn package: 49 mm 2 the HMC1197LP7FE is ideal for: ? multiband/multi-standard cellular bts diversity transmitters ? fixed wireless or wll ? ism transceivers, 900 & 2400 mhz ? gmsk, qpsk, qam, ssb modulators ? multiband basestations & repeaters for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 2 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz electrical specifcations, see test conditions on page-4. parameter typ. typ. typ. typ. units frequency range, rf 450-960 1700-2200 2200-2700 3400-4000 mhz output power 0.4 1.6 1.6 -0.6 dbm conversion voltage gain -5.7 -4.5 -4.5 -6.7 db output p1db +10.5 +10.5 +10 +10 dbm output noise floor -162 -160 -158 -158 dbm/hz output ip3 +32 +30 +30 +22 dbm carrier feedthrough (uncalibrated) -45 -40 -35 -33 dbm sideband suppression (uncalibrated) 40 40 45 35 dbc rf port return loss 12 14 15 12 db parameter conditions min. typ. max. units rf output rf frequency range 100 4000 mhz rf return loss 15 db baseband input port baseband input dc voltage (vbbdc) +0.45 (+0.4 to +0.5) v baseband input dc bias current (ibbdc) single-ended. 110 pa single-ended baseband input capacitance de-embed to the lead of the device. 4.5 pf dc power supply supply voltage (vcc1, vcc2, vcc3, vddls, vddcp, bias, if1p) +4.75 +5.0 +5.25 v supply current of +5v supply (i cc1 ) modulator on and pll on 320 ma modulator off and pll on 152 ma modulator off and pll off 12 ma supply voltage (v3, dvdd, rvdd, vccpd, vccps, vcchf) 3.15 +3.3 3.45 v supply current of +3.3v supply (i cc2 ) modulator on and pll on 48 ma modulator off and pll on 48 ma modulator off and pll off 1 ma enable/disable interface en high level modulator disabled 5 v en low level modulator enabled 0 v enable/disable settling time 530/50 ns lo leakage isolation en_mod=5v, lo=2.1ghz -75 dbm lo output characteristics lo output frequency 50 4100 mhz vco frequency at pll input 2000 4100 mhz vco fundamental frequency 2000 4100 mhz vco output divider vco output divider range 1, 2, 4, .... 60, 62 1 62 pll rf divider characteristics 19-bit n divider range integer 16 524287 fractional 20 524283 electrical specifcations (continued) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 3 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz parameter conditions min. typ. max. units reference input characteristics maximum reference input frequency 350 mhz phase detector (pd) pd frequency fractional mode dc 100 mhz integer mode dc 100 mhz harmonics fo mode at 4000 mhz 2nd / 3rd / 4th -30/-32/-32 dbc vco output divider vco rf divider range 1,2,4,6,8,...,62 1 62 pll rf divider characteristics 19-bit n-divider range (integer) max = 2 19 - 1 16 524,287 19-bit n-divider range (fractional) fractional nominal divide ratio varies (-3 / +4) dynamically max 20 524,283 ref input characteristics max ref input frequency 350 mhz ref input voltage ac coupled 1 2 3.3 vpp ref input capacitance 5 pf 14-bit r-divider range 1 16,383 phase detector (pd) pd frequency fractional mode dc 100 mhz pd frequency integer mode dc 100 mhz vco open loop phase noise at fo @ 4 ghz 10 khz offset -78 dbc/hz 100 khz offset -108 dbc/hz 1 mhz offset -134.5 dbc/hz 10 mhz offset -156 dbc/hz 100 mhz offset -171 dbc/hz vco open loop phase noise at fo @ 4 ghz/2 = 2 ghz 10 khz offset -83 dbc/hz 100 khz offset -113 dbc/hz 1 mhz offset -139.5 dbc/hz 10 mhz offset -165.5 dbc/hz 100 mhz offset -167 dbc/hz figure of merit floor integer mode normalized to 1 hz -230 dbc/hz floor fractional mode normalized to 1 hz -227 dbc/hz flicker (both modes) normalized to 1 hz -268 dbc/hz electrical specifcations, (continued) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 4 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz parameter conditions min. typ. max. units vco characteristics vco tuning sensitivity at 4053 mhz measured at 2.5 v 15 mhz/v vco tuning sensitivity at 3777 mhz measured at 2.5 v 13 mhz/v vco tuning sensitivity at 3411 mhz measured at 2.5 v 12 mhz/v vco tuning sensitivity at 2943 mhz measured at 2.5 v 11. 5 mhz/v vco supply pushing measured at 2.5 v 2 mhz/v electrical specifcations, (continued) calibrated vs. uncalibrated test results during the uncalibrated sideband and carrier suppression tests, care is taken to ensure that the i/q signal paths from the vector signal generator (vsg) to the device under test (dut) are equal. the uncalibrated sideband and carrier suppression plots were measured at t= -40 c, +25 c, and +85 c. the calibrated sideband suppression data was plotted after a manual adjustment of the i/q amplitude balance and i/q phase offset (skew) at +25 c, 5v and 3.3v vcc, lo maximum power level. the +25 c adjustment settings were held constant during tests over temperature. the calibrated carrier suppression data was plotted after a manual adjustment of the ip/in & qp/qn dc offsets at +25 c, 5v and 3.3v vcc, lo maximum power level. the +25 c adjustment settings were held constant during tests over temperature. filter bank selection vs. frequency table frequency (mhz) 500 600 700 800 900 1000/1100 1200 1300/1400/1500 1600 1700/1800 1900/2000 2000 filter bank selection 0 1 5 7 8 0 7 8 9 10 11 15 parameter condition temperature +25 c baseband input frequency 200 khz baseband input dc voltage (vbbdc) +0.45v baseband input ac voltage (peak to peak differential, i and q) 1.3v baseband input ac voltage for oip3 measurements (peak to peak differential, i and q) 650 mv per tone @ 150 & 250 khz baseband input ac voltage for noise floor measurements (peak to peak differential, i and q) no baseband input voltage frequency offset for output noise measurements 20 mhz supply voltage (vcc1, vcc2, vcc3, vddls, vddcp, bias) +5.0v supply voltage (v3, dvdd, rvdd, vccpd, vccps, vcchf) +3.3v lo power level maximum power mounting confguration refer to HMC1197LP7FE application schematic herein sideband & carrier feedthrough uncalibrated test conditions: unless otherwise specifed, the following test conditions were used for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 5 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz rf output power vs. frequency over temperature rf output ip3, p1db & noise floor @ 20 mhz offset vs. frequency over temperature rf return loss vs. frequency uncalibrated carrier feedthrough vs. frequency over temperature when modulator is disabled uncalibrated carrier feedthrough vs. frequency over temperature [1] calibrated carrier feedthrough vs. frequency over temperature [1] -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 0 1000 2000 3000 4000 +25c +85c -40c carrier feedthrough (dbm) frequency (mhz) -25 -20 -15 -10 -5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 return loss (db) frequency (mhz) -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0 1000 2000 3000 4000 +25c +85c -40c carrier feedthrough (dbm) frequency (mhz) -70 -60 -50 -40 -30 -20 -10 0 0 1000 2000 3000 4000 +25c +85c -40c carrier feedthrough (dbm) frequency (mhz) -30 -20 -10 0 10 20 30 40 +25c +85c -40c -180 -170 -160 -150 -140 -130 -120 -110 0 1000 2000 3000 4000 output p1db (dbm) & output ip3 (dbm) output noise floor @20 mhz (dbm/hz) frequency (mhz) noise floor output p1db output ip3 set-up noise floor -15 -10 -5 0 5 10 0 1000 2000 3000 4000 +25c +85c -40c output power (dbm) frequency (mhz) [1] see note titled calibrated vs. uncalibrated test results herein. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 6 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz rf output power & sbr vs. frequency over supply voltage rf output ip3, p1db & noise floor @ 20 mhz offset vs. frequency over supply voltage uncalibrated sideband suppression vs. frequency over temperature [1] calibrated sideband suppression vs. frequency over temperature [1] rf output power & sbr vs. frequency over lo power rf output ip3, p1db & noise floor @ 20 mhz offset vs. frequency over lo power [1] see note titled calibrated vs. uncalibrated test results herein. -15 0 4.75v 5.00v 5.25v -75 -60 -45 -30 -15 0 0 1000 2000 3000 4000 output power (dbm) sideband suppression (dbc) frequency (mhz) sideband suppression output power -30 -20 -10 0 10 20 30 40 4.75v 5.00v 5.25v -180 -170 -160 -150 -140 -130 -120 -110 0 1000 2000 3000 4000 output p1db (dbm) & output ip3 (dbm) output noise floor @20 mhz (dbm/hz) frequency (mhz) noise floor output p1db output ip3 set-up noise floor -70 -60 -50 -40 -30 -20 -10 0 0 1000 2000 3000 4000 +25c +85c -40c sideband suppression (dbc) frequency (mhz) -40 -30 -20 -10 0 10 20 30 40 low (0) medium (1) high (2) max. (3) -190 -180 -170 -160 -150 -140 -130 -120 -110 0 1000 2000 3000 4000 output p1db (dbm) & output ip3 (dbm) output noise floor @20 mhz (dbm/hz) frequency (mhz) noise floor output p1db output ip3 set-up noise floor -15 -10 -5 0 5 low (0) medium (1) high (2) max. (3) -75 -60 -45 -30 -15 0 1000 2000 3000 4000 output power (dbm) sideband suppression (dbc) frequency (mhz) sideband suppression output power -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0 1000 2000 3000 4000 +25c +85c -40c sideband suppression (dbc) frequency (mhz) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 7 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz -1 0 1 2 3 4 5 6 7 8 9 10 11 0.9 1 2 3 4 output power (dbm) input baseband voltage (vpp-diff) rf output power vs. baseband voltage @ 2100 mhz -170 -165 -160 -155 -150 -145 -140 -10 -5 0 5 lo=930mhz lo=1930mhz lo=2530mhz lo=3530mhz output noise @20 mhz (dbm/hz) output power (dbm) rf output noise @ 20 mhz offset vs. output power over lo frequency -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 1 10 100 1000 baseband frequency response (dbc) if frequency (mhz) normalized baseband frequency response [1] [1] i/q input bandwidth normalized to gain at 1 mhz (flo=1800 mhz). i/q inputs are matched to 100 ohms differentially. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 8 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz auxiliary lo output, open loop phase noise @ 3600 mhz auxiliary lo output, fractional mode closed loop phase noise @3600 mhz with various divider ratios [1] auxiliary lo output, open loop phase noise @ 4100 mhz [1] using 122.88 mhz clock input, 61.44 mhz pfd, 2.5 ma cp, 174 ua leakage [2] using 100 mhz clock input, 50mhz pfd, 2.5 ma cp, 174 ua leakage auxiliary lo output, fractional mode closed loop phase noise @4100 mhz with various divider ratios [1] -180 -160 -140 -120 -100 -80 1 10 100 1000 10000 100000 div1 div2 div4 div8 div16 div32 div62 offset (khz) phase noise(dbc/hz) -180 -160 -140 -120 -100 -80 -60 -40 1 10 100 1000 10000 100000 offset (khz) phase noise(dbc/hz) -180 -160 -140 -120 -100 -80 -60 -40 1 10 100 1000 10000 100000 offset (khz) phase noise(dbc/hz) -180 -160 -140 -120 -100 -80 1 10 100 1000 10000 100000 div1 div2 div4 div8 div16 div32 div62 offset (khz) phase noise(dbc/hz) auxiliary lo output, fractional mode closed loop phase noise @ 3300 mhz with various divider ratios [1] -180 -160 -140 -120 -100 -80 1 10 100 1000 10000 100000 div1 div2 div4 div8 div16 div32 div62 offset (khz) phase noise (dbc/hz) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 9 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz fractional-n spurious performance @ 2646.96 mhz exact frequency mode on [1] figure of merit for pll/vco auxiliary lo output, open loop phase noise vs. frequency auxiliary lo output, open loop phase noise vs. frequency auxiliary lo output, open loop phase noise vs. temperature [1] 122.88 mhz clock input, pfd = 61.44 mhz, channel spacing = 240 khz fractional-n spurious performance @ 2646.96 mhz exact frequency mode off [1] -180 -160 -140 -120 -100 -80 -60 -40 1 10 100 1000 10000 100000 3862 mhz 3643 mhz 3491 mhz 3044 mhz 2558 mhz 2129 mhz offset (khz) phase noise (dbc/hz) -180 -160 -140 -120 -100 -80 -60 -40 1 10 100 1000 10000 100000 3862.4 mhz 3643.33 mhz 3491.74 mhz 3044 mhz 2558 mhz 2129.4 mhz offset (khz) phase noise(dbc/hz) -180 -160 -140 -120 -100 -80 -60 -40 1 10 100 1000 10000 100000 offset (khz) phase noise(dbc/hz) -180 -170 -160 -150 -140 -130 -120 -110 -100 100 1000 +25 c -40 c +85 c phase noise (dbc/hz) frequency (mhz) 300 30 100 mhz offset 1 mhz offset 100 khz offset 4000 -240 -230 -220 -210 -200 100 1000 10 4 10 5 10 6 frequeny offset (hz) normalized phase noise (dbc/hz) fom floor fom 1/f noise typ fom vs offset -180 -160 -140 -120 -100 -80 -60 -40 1 10 100 1000 10000 100000 offset (khz) phase noise(dbc/hz) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 10 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz reference input sensitivity, square wave, 50 [3] phase noise floor fom vs reference power & frequency [4] reference input sensitivity, sinusoid wave, 50 [3] typical vco sensitivity auxiliary lo output power vs temperature [1] integrated rms jitter [2] [1] both aux. lo and mod lo gain set to 3 (max level), both aux. lo and mod lo buffer enabled, measured from auxiliary lo port. [2] rms jitter data is measured in fractional mode using 50 mhz reference frequency, from 1 khz to 100 mhz integration bandwidth. [3] measured from a 50 source with a 100 external resistor termination. see pll with integrated rf vcos operating guide reference input stage section for more details. full fom performance up to maximum 3.3 vpp input voltage. [4] measured w?th s?ne wave reference ?nput. 0 0.05 0.1 0.15 0.2 0.25 0.3 0 500 1000 1500 2000 2500 3000 3500 4000 -40 c +25 c +85 c output frequency (mhz) integrated jitter (ps) -10 -5 0 5 10 15 100 1000 +85c -40c +25c output frequency (mhz) output power (dbm) -234 -232 -230 -228 -226 -224 -222 -220 -12 -9 -6 -3 0 3 14 mhz sq 25 mhz sq 50 mhz sq 100 mhz sq fom (dbc/hz) reference power (dbm) 0 10 20 30 40 50 60 70 80 012345 ml core, tuning cap 15 mh core, tuning cap 7 l core, tuning cap 15 h core, tuning cap 7 cl core, tuning cap 15 ch core, tuning cap 15 tuning voltage (v) kvco (mhz/v) -235 -230 -225 -220 -215 -210 -205 -200 -20 -15 -10 -5 0 5 reference power (dbm) floor fom (dbc/hz) 14 mhz 25 mhz 50 mhz 100 mhz -235 -230 -225 -220 -215 -210 -205 -200 -20 -15 -10 -5 0 5 14 mhz sin 100 mhz sq 50 mhz sq 25 mhz sin reference power (dbm) fom (dbc/hz) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 11 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz closed loop phase no?se w?th external vco hmc384lp4e forward transmission gain [1] auxiliary lo differential output return loss auxiliary lo single ended output return loss -180 -160 -140 -120 -100 -80 -60 -40 1 10 100 1000 10000 offset (khz) phase noise(dbc/hz) -5 0 5 10 15 20 400 800 1200 1600 2000 2400 2800 output frequency (mhz) forward tranmission gain (db) s21 ext-in lo out differential output s21 ext-in lo out single-ended output -30 -25 -20 -15 -10 -5 0 100 1000 output frequency (mhz) return loss (db) -30 -25 -20 -15 -10 -5 0 100 1000 output frequency (mhz) return loss (db) [1] s21 from ext_vco (pin 35, 36) in and lo (pin26, 27) out. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 12 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz absolute maximum ratings vcc1, vcc2, vcc3, vddls, vddcp, bias, if1p, en_mod -0.3v to +5.5v v3, dvdd, rvdd, vccpd, vccps, vcchf -0.3v to +3.6v baseband input voltage (ac + dc) (reference to gnd) -0.3v to + 1.3v junction temperature 150 c thermal resistance (r th ) (junction to ground paddle) 4.5 c/w storage temperature -65 to +150 c operating temperature -40 to +85 c esd sensitivity (hbm) 1c outline drawing electrostatic sensitive device observe handling precautions notes: 1. package body material: low stress injection molded plastic silica and silicon impregnated. 2. lead and ground paddle material: copper alloy. 3. lead and ground paddle plating: 100% matte tin. 4. dimensions are in inches [millimeters]. 5. lead spacing tolerance is non-cumulative. 6. characters to be helvetica medium, .025 high, white ink, or laser mark located approx. as shown. 7. pad burr length shall be 0.15mm max. pad burr height shall be 0.25mm max. 8. package warp shall not exceed 0.05mm 9. all ground leads and ground paddle must be soldered to pcb rf ground. 10. refer to hittite application note for suggested pcb land pattern. part number package body material lead finish msl rating package marking [2] h m c1197lp7fe rohs-compliant low stress injection molded plastic 100% matte sn msl1 [1] h1197 xxxx [1] max peak refow temperature of 260 c [2] 4-digit lot number xxxx package information for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 13 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz pin number function description 1 vddcp power supply for charge pump analog section, 5.0v nominal. 2 bias external bypass decoupling for precision bias circuits, 5.0v nominal. 3,4 cp1,cp2 charge pump outputs. 5 rvdd reference supply, 3.3v nominal. 6 xrefp reference input. dc bias is generated internally. normally ac coupled externally. 7 dvdd dc power supply for digital (cmos) circuitry, 3.3v nominal. 8, 13, 14, 22, 23, 24, 28, 29, 30, 41, 42 n/c the pins are not connected internally; however, all data shown herein was measured with these pins connected to rf/dc ground externally. 9 en_mod this pin has a 10 kohm pulldown resistor to gnd. when connected to gnd or left foating the chip is fully enabled. when connected to vcc the lo amplifers and the mixers are disabled. 10 if1p supply voltage for the lo and mixer stage, 5.0v nominal. 11, 12 qn, qp q channel differential baseband input.these are high impedance ports. the nominal recommended bias voltage is 0.45v (0.4v-0.5v) [1] .the nominal recommended baseband input ac voltage is 1.3v peak-to-peak differential.by adjusting the dc offsets on ports qn & qp , the carrier suppression of the device can be optimized for a specifc frequency band and lo power level. the typical offset voltege for optimization is less than 15 mv. the amplitude and phase difference between the i and q inputs can be adjusted in order to optimize the sideband suppression for a specifc frequency band and lo power level 15, 16, 17, 18, 20 gnd these pins and package base must be connected to rf and dc ground. 19 rfout dc coupled and matched to 50 ohms. output requires an external dc blocking capacitor. 21 vcc3 supply voltage for the output stages, 5.0v nominal. 25, 26 i p, i n i channel differential baseband input. these are high impedance ports. the nominal recommended bias voltage is 0.45v (0.4v-0.5v). the nominal recommended baseband input ac voltage is 1.3v peak-to- peak differential.by adjusting the dc offsets on ports in & ip , the carrier suppression of the device can be optimized for a specifc frequency band and lo power level. the typical offset voltege for optimization is less than 15 mv. the amplitude and phase difference between the i and q inputs can be adjusted in order to optimize the sideband suppression for a specifc frequency band and lo power level 27 v3 supply pin for low pass flter, 3.3v nominal. 31 c hip_ en chip enable. connect to logic high for normal operation. 32, 33 lon, lop lo outputs. ac coupled and matched to 50 ohms single ended. do not need external dc decoupling capacitors. the ports could be single-ended or differential. 34 vcc1 vco analog supply 1, 5.0v nominal. 35 vcc2 vco analog supply 2, 5.0v nominal. 36 vtune vco varactor. tuning port input. 37 sen pll serial port enable (cmos) logic input. 38 sdi pll serial port data (cmos) logic input. 39 sck pll serial port clock (cmos) logic input. pin descriptions for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 14 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz pin number function description 40 ld/sdo lock detect, or serial data, or general purpose (cmos) logic output (gpo). 43 ext_n external vco negative input. 44 ext_p external vco positive input. 45 vcchf analog supply, 3.3v nominal. 46 vccps analog supply, prescaler, 3.3v nominal. 47 vccpd analog supply, phase detector, 5.0 v nominal. 48 vddls analog supply, charge pump, 5.0 v nominal. pin descriptions (continued) for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 15 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz evaluation pcb the circuit board used in the application should use rf circuit design techniques. signal lines should have 50 ohm impedance while the package ground leads and exposed paddle should be connected directly to the ground plane similar to that shown. a sufficient number of via holes should be used to connect the top and bottom ground planes. the evaluation circuit board shown is available from hittite upon request. evaluation pcb schematic to view this evaluation pcb schematic please visit www.hittite.com and choose HMC1197LP7FE from the search by part number pull down menu to view the product splash page. item contents part number evaluation pcb only HMC1197LP7FE evaluation pcb eval01-hmc1197lp7f evaluation kit HMC1197LP7FE evaluation pcb usb interface board 6 usb a male to usb b female cable cd rom (contains user manual, evaluation pcb schematic, evaluation software, hittite pll design software) ekit01-hmc1197lp7f evaluation order information for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 16 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz register map reg 00h id register (read only) bit type name w deflt description [23:0] ro chip id 24 c1201h chip id number reg 00h read address register (write only) bit type name w deflt description [4:0] wo read address 5 - specifes the address to be read in the next read cycle. reg 00h reset strobe register (write only) (continued) bit type name w deflt description [5] wo reset 1 - strobe (write only) generates soft reset. resets all digital and registers to default states reg 01h chip enable register bit type name w deflt description [0] r/w chip enable pin select 1 1 1 = chip enable via chip_en pin, reg 01h [0]=1 and chip_en pin low places the pll in power down mode 0 = chip enable via spi - reg 01h [0] = 0, chip_en pin ignored (see power down mode description for more details) [1] r/w spi chip enable 1 1 controls chip enable (power down) if reg 01h [0] =0 reg 01h [0]=0 and reg 01h [1]=1 - chip is enabled, chip_en pin dont care reg 01h [0]=0 and reg 01h [1]=0 - chip disabled, chip_en pin dont care (see power down mode description for more information) [2] r/w keep bias on 1 0 keeps internal bias generators on, ignores chip enable con trol [3] r/w keep pfd pn 1 0 keeps pfd circuit on, ignores chip enable control [4] r/w keep cp on 1 0 keeps charge pump on, ignores chip enable control [5] r/w keep reference buffer on 1 0 keeps reference buffer block on, ignores chip enable con trol [6] r/w keep vco on 1 0 keeps vco divider buffer on, ignores chip enable control [7] r/w keep gpo driver on 1 0 keeps gpo output driver on, ignores chip enable control [9:8] r/w reserved 2 0 reserved for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 17 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz reg 02h reference divider register bit type name w deflt description [13:0] r/w r divider setting 14 1 reference divider r value (eq 8) min 0d max 16383d reg 03h frequency register - integer part bit type name w deflt description [18:0] r/w integer setting 19 25d 19h divider integer part, used in all modes, see (eq 10) fractional mode min 20d max 2 19 -4 = 7fffch = 524,284d integer mode min 16d max 2 19 -1 = 7ffffh = 524,287d reg 04h frequency register - fractional part bit type name w deflt description [23:0] r/w fractional setting 24 0 divider fractional part (24 bit unsigned) see fractional frequency tuning fractional division value = reg4[23:0]/2^24 used in fractional mode only min 0d max 2^24-1 = ffffffh = 16,777,215d reg 05h reserved bit type name w deflt description [23:0] r/w reserved 24 0 reserved for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 18 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz reg 06h delta sigma modulator register bit type name w deflt description [1:0] r/w reserved 2 2d reserved, program to 0h [3:2] r/w dsm order 2 2d select the delta sigma modulator type 0: 1st order 1: 2nd order 2: 3rd order - recommended 3: reserved [4] r/w synchronous spi mode 1 0 0: normal spi load - all register load on rising edge of sen 1: synchronous spi - registers reg 03h , reg 04h , reg 1ah wait to load synchronously on the next internal clock cycle. normally (when this bit is 0) spi writes into the internal state machines/counters happen asynchronously relative to the internal clocks. this can create freq/phase disturbances if writing register 3, 4 or 1a. when this bit is enabled, the internal spi registers are loaded synchronously with the internal clock. this means that the data in the spi shifter should be held constant for at least 2 pfd clock periods after sen is asserted to allow this retiming to happen cleanly. [5] r/w exact frequency mode enable 1 0 1: exact frequency mode enabled 0: exact frequency mode disabled [6] r/w reserved 1 0 reserved [7] r/w fractional bypass 1 0 0: use modulator, required for fractional mode, 1: bypass modulator, required for integer mode note: when enabled fractional modulator output is ignored, but fractional modulator continues to be clocked if reg 06h [11] =1. this feature can be used to test the isolation of the digital frac - tional modulator from the vco output in integer mode. [8] r/w autoseed en 1 1 1: loads the modulator seed (start phase) whenever the fractional register ( reg 04h ) is written 0: when fractional register ( reg 04h ) write changes frequency, modulator starts at previous value (phase) [10:9] r/w reserved 2 3d reserved [11] r/w delta sigma modulator enable 1 1 0: disable dsm, used for integer mode 1: enable dsm core, required for fractional mode [22:12] r/w reserved 11 97d 61h reserved, program to 30h for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 19 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz reg 07h lock detect confguration register bit type name w deflt description [2:0] r/w lock detect window count max 3 4d lock detect window sets the number of consecutive counts of divided vco that must land inside the lock detect window to declare lock 0: 5 1: 32 2: 96 3: 256 4: 512 5: 2048 6: 8192 7: 65535 [13:3] r/w reserved 11 265d 109h reserved, program to 108h [11] r/w lock detect enable 1 0 1: enable lock detect [13:12] r/w reserved 2 0 reserved, program to [14] r/w ld mode 1 1 1: fixed to lock detect training mode [15] r/w csp enable 1 0 cycle slip prevention enable. when enabled, if the phase error becomes larger than approx 70% of the pfd period, the charge-pump gain is increased by approx 6ma for the duration of the cycle.. [19:16] r/w reserved 4 0 reserved [20] r/w lock detect training 1 0 0 to 1 transition triggers the training. lock detect training is only required after changing phase detector frequency. after changing pd frequency a toggle reg 07h [20] from 0 to 1 retrains the lock detect. [21] r/w reserved 1 1 reserved reg 08h analog enable register bit type name w deflt description [20:0] r/w reserved 21 114 6 87d 1bfffh reserved [21] r/w hi frequency reference 1 0 program 1 for xtal > 200 mhz (sets low gain mode for high frequency crystal buffer), 0 otherwise. [22] r/w sdo output level 1 0 output logic level on ld/sdo pin 0: 1.8 v logic levels 1: dvdd3v logic level [23] r/w reserved 1 0 reserved for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 20 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz reg 09h charge pump register bit type name w deflt description [6:0] r/w cp dn gain 7 100d 64h charge pump dn gain control 20ua/step affects fractional phase noise and lock detect settings 0d = 0ua 1d = 20ua 2d = 40ua ... 127d = 2.54ma [13:7] r/w cp up gain 7 100d 64h charge pump up gain control 20ua/step affects fractional phase noise and lock detect settings 0d = 0ua 1d = 20ua 2d = 40ua ... 127d = 2.54ma [20:14] r/w offset current 7 81d 51h charge pump offset control 5ua/step affects fractional phase noise and spursand lock detect settings 0d = 0ua 1d = 5ua 2d = 110ua ... 127d = 635ua [21] r/w offset current up 1 0 1 - sets direction of reg 09h [20:14] up, 0- up offset off [22] r/w offset current dn 1 1 1 - sets direction of reg 09h [20:14] down, 0- dn offset off [23] r/w hik charge pump mode 1 0 hi kcp charge pump - very low noise, narrow compliance range, requires external opamp in the loop flter. reg 0ah vco autocal confguration register bit type name w deflt description [2:0] r/w vtune resolution 3 6d 1,2,4,8,...,32,64,128,256 rdiv cycles for frequency measurement. measurement should last > 4 sec. note: 1 does not work if r divider = 1. [10:3] r/w reserved 8 8d reserved [11] r/w autotune disable 1 0 1 - disable autotune procedure [12] r/w reserved 1 0 reserved [14:13] r/w fsm clock select 2 1 set the autocal fsm (50 mhz maximum) 0: input crystal reference 1: input crystal reference/4 2: input crystal reference/16 3: input crystal reference/32 [16:15] r/w reserved 2 0 reserved [17] r/w auto relock - one try 1 0 1: attempts to relock if lock detect fails for any reason. only tries once. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 21 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz reg 0bh pd/cp register bit type name w deflt description [3:0] r/w reserved 4 1 reserved [4] r/w pd phase select 1 0 inverts the pd polarity (program to 0) 0- use with a positive tuning slope vco and passive loop filter (default) 1- use with a negative slope vco or with an inverting active loop filter with a positive slope vco [5] r/w pd up output enable 1 1 enables the pd up output, see also reg 0bh reg 7h [9] [6] r/w pd down output enable 1 0 enables the pd dn output, see also reg 0bh reg 7h [10] [8:7] r/w reserved 2 0 reserved, program to 0d. [9] r/w force cp up 1 0 forces cp up output on if cp is not forced down - use for test only [10] r/w force cp dn 1 0 forces cp dn output on if cp is not forced up - use for test only [11] r/w force cp mid rail 1 0 force cp mid rail - use for test only (if force cp up or force cp dn are enabled they have precedence) [23:12] r/w reserved 12 124d 7ch reserved. program to 78h reg 0ch exact frequency register bit type name w deflt description [23:0] r/w number of channels per fpd 24 0 comparison frequency divided by the correction rate. must be an integer. frequencies at exactly the correction rate will have zero frequency error. only works in modulator mode b. must be 0 otherwise 0: disabled 1: invalid 2 valid for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 22 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz reg 0fh gpo register bit type name w deflt description [4:0] r/w gpo 5 1 select signal to be output to sdo pin when enabled 0: data from reg0f[5] 1: lock detect output 2. lock detect trigger 3: lock detect window output 4: ring osc test 5. pullup hard from csp 6. pulldn hard from csp 7. reserved 8: reference buffer output 9: ref divider output 10: vco divider output 11. modulator clock from vco divider 12. auxiliary clock 13. aux spi clock 14. aux spi enable 15. aux spi data out 16. pd dn 17. pd up 18. sd3 clock delay 19. sd3 core clock 20. autostrobe integer write 21. autostrobe frac write 22. autostrobe aux spi 23. spi latch enable 24. vco divider sync reset 25. seed load strobe 26.-29 not used 30. spi output buffer en 31. soft rstb [5] r/w gpo test data 1 0 1 - gpo test data when gpo_select = 0 [6] r/w prevent automux sdo 1 0 1- outputs gpo data only 0- automuxes between sdo and gpo data [7] r/w ldo driver always on 1 0 only for hmc spi mode 1- ld_sdo pin driver always on 0- ld_sdo pin driver only on during spi read cycle [8] r/w disable pfet 1 0 program to 1 if external pull-ups are used on the sdo line (prevents conficts on the spi bus) [9] r/w disable nfet 1 0 program to 1 if external pull-downs are used on the sdo line (prevents conficts on the spi bus) reg 10h tuning register (read only) bit type name w deflt description [7:0] r vco tune curve 8 16d 10h vco sub-band selection. 0- maximum frequency 1111 1111b - minimum fre quen cy [8] r vco tuning busy 1 0 indicates if the vco tuning is in process 1- busy 0- not busy for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 23 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz reg 11h sar register (read only) bit type name w deflt description [18:0] r sar error magnitude count 19 2 19 - 1d 7ffffh sar error magnitude count [19] r sar error sign 1 0 sar error sign 0: positive 1: negative reg 12h gpo/ld register (read only) bit type name w deflt description [0] r gpo out 1 0 gpo output [1] r lock detect out 1 0 lock detect output [4:2] r reserved 3 28d 1ch reserved reg 13h bist register (read only) bit type name w deflt description [16:0] r reserved 16 4697d 1259h reserved reg 14h auxiliary spi register bit type name w deflt description [0] r/w aux spi mode 1 0 1- use the 3 outputs as an spi port 0- use the 3 outputs as a static gpo port [3:1] r/w aux gpo values 3 0 output values when reg 7h [1] = 1 [4] r/w aux gpo 3.3 v 1 0 0- 1.8 v output out of the auxiliary gpo pins when reg 10h [1] = 1 1- 3.3 v output out of the auxiliary gpo pins when [1] = 1 [8:5] r/w reserved 4 1 reserved [9] r/w phase sync 1 1 when set, chip_en pin is used as a trigger for phase synchronization. can be used to synchronize multiple HMC1197LP7FE, or to along with the reg 20h value to phase step the output. (exact frequency mode must be enabled) [11:10] r/w aux spi gpo output 2 0 option to send gpo multiplexed data (ex lock detect) to one of the auxiliary outputs 0- none 1 - to [0] 2 - to [1] 3 - to [2] [13:12] r/w aux spi outputs 2 0 when disabled: 0 - outputs hi z 2 - outputs stay driven 3 - outputs driven to high 4 - outputs driven to low for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 24 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz reg 15h manual vco confg register bit type name w deflt description [0] r/w manual calibration mode 1 0 1- vco subsystem manual calibration enabled 0- vco subsystem manual calibration disabled [5:1] r/w capacitor switch setting 5 16d 10h capacitor switch setting [8:6] r/w manual vco selection 3 2d manual vco selection [9] r/w manual vco tune enable 1 0 1- manual vco tuning enabled 0- manual vco tuning disabled [15:10] r/w reserved 6 18d 12h reserved [16] r/w enable auto-scale cp current 1 1 1 - automatically scale cp current based on vco frequency and capacitor setting 0- dont scale cp current [19:17] r/w reserved 3 7d reserved reg 16h gain divider register bit type name w deflt description [5:0] r/w rf divide ratio 6 1d 0 - mute, vco and pll buffer on, rf output stages off 1 - fo 2 - fo/2 3 - invalid, defaults to 2 4 - fo/2 5 - invalid, defaults to 4 6 - fo/6 ... 60 - fo/60 61 - invalid, defaults to 60 62 - fo/62 > 62 - invalid, defaults to 62 [7:6] r/w lo output buffer gain control 2 3d 3 - max gain 2 - max gain - 3 db 1 - max gain - 6 db 0 - max gain - 9 db [9:8] r/w lo2 output buffer gain control 2 2d 3 - max gain 2 - max gain - 3 db 1 - max gain - 6 db 0 - max gain - 9 db [10] r/w divider output stage gain control 1 1 1 - max gain 0 - max gain - 3 db for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 25 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz reg 17h modes register bit type name w deflt description [0] r/w vco subsys master enable 1 1 master enable for the entire vco subsystem 1 - enable 0 - disable chip enable is also required. [1] r/w vco enable 1 1 [2] r/w external vco buffer enable 1 0 external vco buffer to output stage enable. only used when locking an external vco. [3] r/w pll buffer enable 1 1 pll buffer enable. used when using an internal vco. [4] r/w lo output buffer enable 1 0 enables lo (lo_p & lo_n pins) output buffer. [5] r/w lo2 output buffer enable 1 1 enables the second (lo2_n & lo2_p pins) output buffer [6] r/w external input enable 1 0 enables external vco input [7] r/w pre lock mute enable 1 1 mute both output buffers until the pll is locked [8] r/w lo output single-ended enable 1 1 enables single-ended output mode for lo output 1- single-ended mode, lo_n pin is enabled, and lo_p pin is disabled 0- differential mode, both lo_n and lo_p pins enabled please note that single-ended output is only available on lo_n pin. [9] r/w lo2 output single-ended enable 1 0 enables single-ended output mode for lo2 output 1- single-ended mode, lo2_n pin is enabled, and lo2_p pin is disabled 0- differential mode, both lo2_n and lo2_p pins enabled please note that single-ended output is only available on lo2_n pin. [10] r/w reserved 1 0 reserved [11] r/w charge pump output select 1 0 connects cp to cp1 or cp2 output. 0: cp1 1: cp2 reg 18h bias register bit type name w deflt description [18:0] r/w reserved 19 21697d 54c1h reserved [19] r/w external input buffer bias bit0 1 0 external input buffer bias bit0 [20] r/w external input buffer bias bit1 1 0 external input buffer bias bit1 reg 19h cals register bit type name w deflt description [23:0] r/w reserved 2 2730d aaah reserved. program to 2f3h. reg 1ah seed register bit type name w deflt description [23:0] r/w delta sigma modulator seed 24 816897d c7701h for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 26 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz reg 21h programmable harmonic lpf register chip id = 6h, regaddress = 01h, (reg01h) (write only) [1] bit type name w deflt description [15:0] w harmonic lpf band select 16 15d fh low pass filter 3 db bandwidth setting on the output of lo pins (lo_n & lo_p pins) 0: 970 mhz 1: 1000 mhz 2: 1030 mhz 3: 1055 mhzl 4: 1085 mhz 5: 1120 mhz 6: 1155 mhz 7: 1195 mhz 8: 2335 mhz 9: 2430 mhz 10: 2530 mhz 11: 2655 mhz 12: 2770 mhz 13: 2940 mhz 14: 3145 mhz 15: 3400 mhz [23:16] w reserved 8 reserved a write of c1h is required every time bandwidth setting in reg 21h [15:0] is changed. [1] to write to this register initially set reg14h[0] = 1 to forward spi data on auxspi port, then write to this register with chip_id = 6h, and regaddress = 1h, then to not change the band select on teh following register writes, write reg14h[0] = 0h for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 27 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz application information principle of operation figure 1. the HMC1197LP7FE simplifed block diagram the HMC1197LP7FE is a low-noise, high-linearity, direct quadrature modulator with fractional-n pll&vco rfic designed for directly converting complex modulated baseband signals from zero if or low if to rf transmission levels from 100 mhz to 4 ghz. the HMC1197LP7FEs excellent noise and linearity performance makes it suitable for a wide range of transmission standards, including single and multicarrier cdma, umts, cdma2000, gsm/edge, w-cdma, td-scdma, and wimax/lte applications. as shown in the simplifed block diagram (figure 1) the HMC1197LP7FE offers an easy-to-use, complete direct conversion solution in a highly compact 7 x 7 mm plastic package thereby reducing cost, area, and power consumption. the HMC1197LP7FE modulator consists of the following functional blocks: 1. pll & vco 2. i/q modulator: i and q input differential voltage-to-current converters, i and q upconverting mixers and the differential-to-single-ended converter, high accuracy lo quadrature phase splitter and lo limiting amplifers 3. harmonic low pass filter i/q modulator the differential baseband inputs (qp, qn, ip, and in) present a high impedance. the dc common-mode voltage at the baseband inputs sets the currents in the i and q double-balanced mixers. the nominal baseband input dc common-mode voltage used in the characterization of the HMC1197LP7FE is 0.45v, which should be externally applied. the baseband input dc common-mode voltage can be varied between 0.4v and 0.5v to optimize overall modulator performance. it is not recommended to leave the baseband inputs foating which generates excessive current fow that may cause damage to the ic. the baseband inputs should be pulled down to gnd in shutdown mode. the nominal baseband input ac voltage used in the characterization of the HMC1197LP7FE is 1.3vpp differential. the baseband input ac voltage can be varied to optimize overall modulator performance. it is recommended to drive the baseband inputs differentially to reduce even-order distortion products and also use reconstruction flters at the baseband inputs to avoid aliasing for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 28 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz i/q modulator includes a lo quadrature phase splitter that generates two carrier signals in quadrature followed by lo limiting amplifers which are used to drive the i and q mixers with saturated signal levels. therefore, the lo path is immune to large variations in the lo input signal level and the modulator performance does not vary much with lo input power. after upconversion, the outputs of the i and q mixers are summed together differentially and converted to single- ended rf output. the single-ended rf output port is internally matched to 50 ohms and does not require any external matching components. only a standard dc-blocking capacitor is required at this interface. harmonic low pass filter high lo harmonic content causes amplitude and phase mismatches and ultimately performance degradation in modulator sideband rejection. -80 -70 -60 -50 -40 -30 -20 -10 0 -80 -70 -60 -50 -40 -30 -20 -10 0 hmc701 sweeper plot 11:18:12 am 3/19/2012 lo harmonic level (dbc) modulator sideband rejection (dbc) 3rd lo harmonic 2nd lo harmonic targeted minimum lo harmonic level targeted maximum modulator sideband rejection figure 2. typical impact of 2nd and 3rd lo harmonic on sideband rejection. as shown in figure 2, in a typical modulator with 1xlo input both the 2nd and 3rd lo harmonics affect the modulator sideband rejection performance at levels > -20 dbc relative to the lo signal power. it also shows that the 3 rd lo harmonic has greater impact on modulator sideband rejection performance than the 2 nd , and that there is little effect of the 2 nd lo harmonic on modulator sideband rejection once the 2 nd lo harmonic is below -20 dbc levels, relative to the lo signal level. figure 3 shows the typical insertion loss of the low pass flter. -40 -35 -30 -25 -20 -15 -10 -5 0 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 frequency (mhz) insertion loss (db) band 0 band 7 band 8 band 15 low bands high bands figure 3. insertion loss of the low pass flter. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 29 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz lo harmonic flters 16 user programmable bands enable the user to optimally attenuate 2 nd and/or 3 rd lo harmonics in order to maximize sideband rejection performance. table 1. the frequency band selection for optimal 3 rd harmonic attenuation. frequency (mhz) 500 600 700 800 900/1000 1100 1200 1300 1400 1500 1600 1700 1800 filter bank selection 0 1 4 6 7 8 9 11 12 13 13 14 15 table 2. the frequency band selection for optimal 2 nd harmonic attenuation. frequency (mhz) 700 800/900 1000 1100 1200/1300/1400 1500/1600/1700 1800 1900 2000 2100 2200/2300 2400/2500/2600 2700 filter bank selection 0 1 4 5 7 8 9 10 11 12 13 14 15 uncalibrated sideband rejection can be further improved by empirically selecting the flter bank that provides the highest rejection for a given frequency . see table 3 and figure 4. table 3. empirical flter band selection. frequency (mhz) 500 600 700 800 900 1000/1100 1200 1300/1400/1500 1600 1700/1800 1900/2000 >2000 filter bank selection 0 1 5 7 8 0 7 8 9 10 11 15 -70 -60 -50 -40 -30 -20 -10 0 0 1000 2000 3000 4000 3rd harmonic suppression 2nd harmonic suppression empirical band selection uncalibrated sideband suppression (dbc) frequency (mhz) figure 4. sideband suppression vs. frequency for different flter band selections. the flter bank selection process for optimal sideband rejection performance also depends on the lo power level at the output of the pll/vco. lo power in this example set to maximum power level. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 30 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz carrier feedthrough calibration carrier feedthrough is related to the dc offsets at the differential baseband inputs of the modulator. if exactly the same dc common-mode voltage is applied to each of the baseband inputs, and there were no dc offsets at the differential baseband inputs, the lo leakage at the rf output would be perfectly suppressed. by adding small dc offset voltages at the differential baseband inputs, the carrier feedthrough can be optimized for a specifc frequency band and lo power level. the carrier feedthrough can not be calibrated by the dc common- mode level at the i and q baseband inputs. dc offsets at the differential i and q baseband inputs should be iteratively adjusted until a minimum carrier feedthrough level is obtained. externally available offset voltage step resolution and the modulators noise foor limit the minimum achievable calibrated carrier feedthrough level. the typical offset voltages for optimization are less than 15mv. figure 5 illustrates the typical calibrated carrier feedthrough performance of the HMC1197LP7FE. in this characterization of the HMC1197LP7FE, carrier feedthrough was calibrated with 500mhz lo frequency steps at 25c and external offset voltage settings were held constant during tests over temperature. -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0 1000 2000 3000 4000 +25c +85c -40c carrier feedthrough (dbm) frequency (mhz) figure 5. the HMC1197LP7FE calibrated carrier feedthrough sideband suppression calibration sideband suppression is related to relative gain and relative phase offsets between the i-channel and q-channel. the amplitude and phase difference between the i and q inputs can be adjusted in order to optimize the sideband suppression for a specifc frequency band and lo power level. the amplitude and phase offsets at the i and q inputs should be iteratively adjusted until a minimum sideband suppression level is obtained. the externally available amplitude and phase steps and the modulators noise foor limit the minimum achievable calibrated sideband suppression level. figure 6 illustrates the typical calibrated sideband suppression performance of the HMC1197LP7FE. in this characterization of the HMC1197LP7FE, sideband suppression was calibrated at every 500mhz lo frequency steps at 25c and external amplitude and phase offset settings were held constant during tests over temperature. for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 31 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0 1000 2000 3000 4000 +25c +85c -40c sideband suppression (dbc) frequency (mhz) figure 6. the HMC1197LP7FE calibrated sideband suppression linearity optimization output ip3 (oip3) of the HMC1197LP7FE depends on the dc common-mode level at the i and q baseband inputs. the dc common-mode level at the i and q baseband inputs can be adjusted in order to optimize the oip3 for a specifc frequency band. figure 7 illustrates the typical relationship between oip3 and the dc common-mode level at the i and q baseband inputs for different lo frequencies. as shown in figure 7, oip3 of the HMC1197LP7FE can be optimized up to 35dbm. 0 5 10 15 20 25 30 35 40 45 0.4 0.45 0.5 0.55 0.6 450 mhz 900 mhz 1900 mhz 2600 mhz 3500 mhz output ip3 (dbm) baseband voltage (v) figure 7. the HMC1197LP7FE linearity optimization for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 32 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz gsm/edge operation the HMC1197LP7FE is suitable for gsm/edge applications. the evm performance of the HMC1197LP7FE in a gsm/edge environment is shown in figure 8. -1 0 1 2 3 4 5 6 -15 -12 -9 -6 -3 0 3 6 900 mhz 1900 mhz evm (%rms) output power (dbm) figure 8. the HMC1197LP7FE evm vs. output power @ gsm/edge(8-psk ) wimax operation the HMC1197LP7FE is suitable for wimax applications. the evm performance of the HMC1197LP7FE in a wimax environment is shown in figure 9. 0 1 2 3 4 5 -12 -9 -6 -3 0 3 wimax evm (%rms) output power (dbm) figure 9. the HMC1197LP7FE evm vs. output power @ wimax 64qam 3500mhz for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 33 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz w-cdma operation the HMC1197LP7FE is suitable for w-cdma operation. figure 10 shows the adjacent and alternate channel power ratios for the HMC1197LP7FE at an lo frequency of 2140 mhz. the HMC1197LP7FE is able to deliver about ?74 dbc acpr and ?80 dbc altcpr at an output power of ?10 dbm. acpr and altcpr performances of the HMC1197LP7FE can be improved by adjusting the dc common-mode level on the i and q baseband inputs. -90 -80 -70 -60 -50 -40 -30 -30 -25 -20 -15 -10 -5 0 acpr altacpr acpr and altacpr (db) output power (dbm) the HMC1197LP7FE acpr and altcpr vs. output power @ wcdma lte operation the HMC1197LP7FE is suitable for lte applications. the evm performance of the HMC1197LP7FE in a lte environment is shown in figure 11. 0 1 2 3 4 5 6 7 8 -15 -12 -9 -6 -3 0 3 700 mhz 1700 mhz evm (%rms) output power (dbm) figure 10. the HMC1197LP7FE evm vs. output power @ lte downlink 25rb qpsk for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com
tranceivers - tx rfics - smt 34 HMC1197LP7FE v00.0912 wideband direct quadrature modulator w/ fractional-n pll & vco, 100 - 4000 mhz using an external vco in order to confgure HMC1197LP7FE to use with an external vco, register 17 needs to be confgured to disable the on chip vco and vco to pll path. enable external buffer, second cp link and external i/o switch. to make these changes reg 17 [0:11] should be confgured as 3157d. HMC1197LP7FE is confgured as pll alone used with external vco hmc384lp4e. loop filter components are used as in figure 12.. -180 -160 -140 -120 -100 -80 -60 -40 1 10 100 1000 10000 offset (khz) phase noise(dbc/hz) figure 12. loop flter components for HMC1197LP7FE is confgured as pll alone used with external vco hmc384lp4e for detailed theory of operation of pll/vco, please refer to the plls with integrated vcos - rf vcos operating guide . figure 13. closed loop phase noise with external hmc384lp4e vco @ 2200 mhz for price, delivery and to place orders: hittite microwave corporation, 2 elizabeth drive, chelmsford, ma 01824 phone: 978-250-3343 fax: 978-250-3373 order on-line at www.hittite.com application support: phone: 978-250-3343 or apps@hittite.com

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